Frequently Asked Questions

Livt is a higher-level programming language and platform for FPGA development. It is designed to bring modern software engineering ideas such as abstraction, interfaces, testing, package management, and better tooling into hardware design.

Create an Eccelerators account, which provides your licence, install the Livt extension for Visual Studio Code, and follow Hello, Livt! to write, test and build your first design. The installation guide covers each step.

Not in the simplistic sense. Livt is better understood as a modern way to describe hardware structure, behavior, tests, and reusable interfaces while still fitting into established hardware toolchains.

Traditional HDL is precise and powerful, but it exposes many low-level details directly in the source code. That makes large projects harder to maintain and evolve. Livt focuses on behavior, structure, and contracts first, so developers can describe intent more directly.

HLS is very useful for turning algorithmic or compute-heavy code into hardware, especially for datapaths and accelerators. But HLS is usually centered on translating software-shaped code into RTL. Livt is different: it is intended to support modern hardware design more broadly, including architecture, interfaces, maintainability, testing, packaging, and integration.

HLS asks how software can become hardware.
Livt asks how modern hardware should be designed.

Interfaces are a first-class language construct in Livt. They let developers define explicit contracts independently of any concrete implementation. This helps isolate vendor-specific details, enables testing with mocks, and makes designs easier to evolve and port.

In many FPGA projects, vendor IP is encapsulated but not truly abstracted. Livt introduces a cleaner separation between contract and implementation so that designs become more maintainable.

No. Livt combines the language with package management, VS Code integration, vendor integration, testing, CI/CD workflows, and Livt Agent.

Livt can complement AI very well. A higher-level language with stronger structure, explicit contracts, and modern tooling gives LLMs a better environment to assist developers. Rather than competing with AI, Livt can provide a more effective substrate for AI-assisted hardware development.

In an AI-assisted workflow, developers can review designs at a higher level — in terms of behavior, structure, and interfaces — while still checking tests and integration results. That makes review faster, clearer, and more trustworthy.

Livt is for teams that build FPGA-based products and want to iterate faster, reuse more of their work and test earlier. FPGA engineers keep explicit control of timing and hardware structure, and software engineers who occasionally work with programmable logic get a more familiar way of working.

Yes. Livt is designed to coexist with existing hardware design flows. Handwritten modules and HLS-produced blocks can be used alongside Livt components when they provide a clear interface. In that sense, Livt can act as the architectural layer that unifies heterogeneous implementation sources.