Livt packages

Eccelerators.RiscV

Version 0.3.0

Composable RV32I and Zmmul processors, machine-mode support, and reusable FPGA system components written in Livt.

Published files (120)

tests/Rv32iPackageApiTest.lvt

namespace Eccelerators.RiscV.Tests

using Eccelerators.RiscV.System
using Eccelerators.RiscV.Presets

/**
 * Checks the public turnkey system API through its exported namespace: default
 * device provisioning, run-to-halt execution and software restart. Scenarios
 * initialize their own program image while the core is idle.
 */
@Test
component Rv32iPackageApiTest
{
	// Owned system-level machine using the default ROM/RAM devices.
	system: RvMemorySystem<Rv32iSequentialCore>

	/**
	 * Constructs the owned subject; scenarios supply their own program.
	 */
	new()
	{
		system = new RvMemorySystem<Rv32iSequentialCore>()
	}

	/**
	 * Idles the system, then loads a two-word program while not running.
	 */
	fn Load(word: uint)
	{
		system.run = 0b0
		var elapsed: uint = 0

		while (system.idle == 0b0 && elapsed < 100) {
			state {
				elapsed++
			}
		}

		assert system.idle == 0b1
		var ticket = ~system.restartAck

		state {
			system.restartRequest = ticket
		}

		elapsed = 0

		while (system.restartAck != ticket && elapsed < 100) {
			state {
				elapsed++
			}
		}

		assert system.restartAck == ticket
		assert system.halted == 0b0

		state {
			system.fetchProgramWrite = 0b1
			system.fetchProgramIndex = 0 as logic[10]
			system.fetchProgramData = word as logic[32]
		}

		state {
			system.fetchProgramIndex = 1 as logic[10]
			system.fetchProgramData = 0x00100073 as logic[32]
		}

		state {
			system.fetchProgramWrite = 0b0
		}
	}

	/**
	 * A documented entry point executes addi, reports retirement and restarts.
	 */
	@Test
	fn TestDocumentedEntryPoint()
	{
		Load(0x04400093)
		var elapsed: uint = 0

		state {
			system.run = 0b1
		}

		while (system.halted == 0b0 && elapsed < 300) {
			state {
				elapsed++
			}
		}

		assert system.halted == 0b1
		assert system.faultCause as uint == 3
		assert system.faultValue as uint == 4
		assert system.pc as uint == 4
		assert system.retired == 0b0
		assert system.retiredRd as uint == 1
		assert system.retiredValue as uint == 0x44
		assert system.retiredPc as uint == 0
		assert system.retiredInstruction as uint == 0x00100073

		state {
			system.run = 0b0
		}

		var ticket = ~system.restartRequest

		state {
			system.restartRequest = ticket
		}

		elapsed = 0

		while (system.restartAck != ticket && elapsed < 100) {
			state {
				elapsed++
			}
		}

		assert system.restartAck == ticket
		assert system.halted == 0b0 && system.pc as uint == 0
	}
}