Livt.Bus

src/avalon/AvalonMaster.lvt

namespace Livt.Bus.Avalon

using Livt.Bus

/**
 * Width-configurable Avalon-MM transaction master for non-pipelined transfers.
 */
component AvalonMaster<AddressWidth: int = 32, DataWidth: int = 32, CheckAlignment: bool = true> : IAvalonMaster<Logic[AddressWidth], Logic[DataWidth], Logic[BYTE_COUNT]>, IMemoryMappedMaster<Logic[AddressWidth], Logic[DataWidth], Logic[BYTE_COUNT]>
{
	const BYTE_COUNT: int = DataWidth / 8
static assert DataWidth == 32 || DataWidth == 64 || DataWidth == 128, "DataWidth must be 32, 64 or 128"
static assert AddressWidth >= Bits.RequiredFor(DataWidth / 8 - 1) && AddressWidth <= 64, "AddressWidth cannot represent byte lanes or exceeds 64"

	/**
	 * Avalon response code for a successful request.
	 */
	public const RESPONSE_OKAY: Logic[2] = 0b00

	/**
	 * Byte-enable value selecting all native data lanes.
	 */
	public const ALL_BYTES: Logic[BYTE_COUNT] = ~(0 as Logic[BYTE_COUNT])

	timeoutTicks: uint
	lastReadValue: Logic[DataWidth]
	lastResponse: Logic[2]
	lastTimedOut: bool

	// Scheduled command mailbox; held stable until the engine acknowledges release.
	commandAddress: logic[AddressWidth]
	commandWriteData: logic[DataWidth]
	commandByteEnable: logic[BYTE_COUNT]
	commandIsRead: bool
	commandPending: bool
	transferComplete: bool

	// Single-owner request registers and direct response observations.
	requestAddress: logic[AddressWidth]
	requestByteEnable: logic[BYTE_COUNT]
	requestWrite: logic
	requestWriteData: logic[DataWidth]
	requestRead: logic
	targetReadData: logic[DataWidth]
	targetWaitRequest: logic
	targetResponse: logic[2]

	/**
	 * Initializes the timeout; reset leaves the bus and command mailbox idle.
	 */
	new()
	{
		this.timeoutTicks = this.context.TicksFor(1ms)
	}

	/**
	 * Sets the maximum ticks to wait for waitrequest to be deasserted.
	 * The count is exact; zero times out on the first stalled evaluation.
	 */
	override fn SetTimeoutTicks(timeoutTicks: uint)
	{
		this.timeoutTicks = timeoutTicks
	}

	/**
	 * Returns the maximum ticks allowed for a request.
	 */
	override fn GetTimeoutTicks() uint
	{
		return timeoutTicks
	}

	/**
	 * Returns the data captured by the most recently accepted read.
	 */
	override fn LastReadValue() Logic[DataWidth]
	{
		return lastReadValue
	}

	/**
	 * Returns the Avalon response captured for the most recent accepted request.
	 */
	override fn LastResponse() Logic[2]
	{
		return lastResponse
	}

	/**
	 * Returns true when the most recent request timed out.
	 */
	override fn LastTimedOut() bool
	{
		return lastTimedOut
	}

	/**
	 * Performs one non-pipelined Avalon-MM write using the selected byte lanes.
	 * Returns true when the request is accepted; inspect LastResponse for status.
	 * After a timeout, the call holds the request until acceptance before returning.
	 */
	override fn TryWrite(address: Logic[AddressWidth], value: Logic[DataWidth], byteEnable: Logic[BYTE_COUNT]) bool
	{
		if (CheckAlignment) {
			assert (address & ((BYTE_COUNT - 1) as Logic[AddressWidth])) == (0 as Logic[AddressWidth])
		}

		var completed = this.ExecuteTransfer(address, value, byteEnable, false)
		return completed
	}

	/**
	 * Performs one non-pipelined Avalon-MM read and stores the accepted read data.
	 * Returns true when the request is accepted; inspect LastResponse for status.
	 * After a timeout, the call holds the request until acceptance before returning.
	 */
	override fn TryRead(address: Logic[AddressWidth]) bool
	{
		if (CheckAlignment) {
			assert (address & ((BYTE_COUNT - 1) as Logic[AddressWidth])) == (0 as Logic[AddressWidth])
		}

		var completed = this.ExecuteTransfer(address, 0, ALL_BYTES, true)
		return completed
	}

	/**
	 * One read with explicit lane enables. Address and enables are transmitted unchanged.
	 */
	override fn TryReadMasked(address: Logic[AddressWidth], byteEnable: Logic[BYTE_COUNT]) bool
	{
		if (CheckAlignment) {
			assert (address & ((BYTE_COUNT - 1) as Logic[AddressWidth])) == (0 as Logic[AddressWidth])
		}

		var completed = this.ExecuteTransfer(address, 0 as Logic[DataWidth], byteEnable, true)
		return completed
	}

	/**
	 * Submits a stable command and waits for the bus engine to drain the request.
	 */
	private fn ExecuteTransfer(address: Logic[AddressWidth], value: Logic[DataWidth], byteEnable: logic[BYTE_COUNT], isRead: bool) bool
	{
		this.commandAddress = address as logic[AddressWidth]
		this.commandWriteData = value as logic[DataWidth]
		this.commandByteEnable = byteEnable
		this.commandIsRead = isRead
		this.commandPending = true

		state WaitForCompletion {
			if (this.transferComplete) {
				goto Release
			} else {
				goto WaitForCompletion
			}
		}

		state Release {
			this.commandPending = false
			goto WaitForIdle
		}

		state WaitForIdle {
			if (this.transferComplete) {
				goto WaitForIdle
			} else {
				goto Finish
			}
		}

		state Finish {}

		return !this.lastTimedOut
	}

	/**
	 * Wires the bus without retiming its acceptance handshake.
	 */
	process Connect[]()
	{
		this.address = this.requestAddress
		this.byteenable = this.requestByteEnable
		this.write = this.requestWrite
		this.writedata = this.requestWriteData
		this.read = this.requestRead
		this.targetReadData = this.readdata
		this.targetWaitRequest = this.waitrequest
		this.targetResponse = this.response
	}

	/**
	 * Owns the bus registers. Acceptance captures the response and lowers the
	 * request on the same clock edge. A deadline never cancels a stalled transfer.
	 */
	process Transfer()
	{
		var elapsed: uint = 0
		var deadline: uint = 0

		state Idle {
			if (this.commandPending) {
				elapsed = 0
				deadline = this.timeoutTicks
				this.lastResponse = RESPONSE_OKAY
				this.lastTimedOut = false
				this.requestAddress = this.commandAddress
				this.requestByteEnable = this.commandByteEnable
				this.requestWriteData = this.commandWriteData

				if (this.commandIsRead) {
					this.lastReadValue = 0
					this.requestRead = 0b1
					this.requestWrite = 0b0
				} else {
					this.requestRead = 0b0
					this.requestWrite = 0b1
				}

				goto Active
			} else {
				goto Idle
			}
		}

		state Active {
			if (this.targetWaitRequest == 0b0) {
				if (this.commandIsRead) {
					this.lastReadValue = this.targetReadData as Logic[DataWidth]
				}

				this.lastResponse = this.targetResponse
				this.requestRead = 0b0
				this.requestWrite = 0b0
				this.requestByteEnable = 0b0000
				this.transferComplete = true
				goto WaitForRelease
			} elif ((elapsed + 1) >= deadline) {
				this.lastTimedOut = true
				goto Recover
			} else {
				elapsed = elapsed + 1
				goto Active
			}
		}

		state Recover {
			if (this.targetWaitRequest == 0b0) {
				this.requestRead = 0b0
				this.requestWrite = 0b0
				this.requestByteEnable = 0b0000
				this.transferComplete = true
				goto WaitForRelease
			} else {
				goto Recover
			}
		}

		state WaitForRelease {
			if (this.commandPending) {
				goto WaitForRelease
			} else {
				this.transferComplete = false
				goto Idle
			}
		}
	}
}